In recent years, data rewritable non-volatile memory semiconductor devices are widely used. For example, in typical non-volatile memories such as flash memories, transistors forming memory cells have floating gates or insulation films that are known as charge storage layers. In such flash memories, charges are accumulated in the charge storage layers to store data. An example of a flash memory having an insulating film as a charge storage layer is a flash memory with a SONOS (Silicon Oxide Nitride Oxide Silicon) structure that stores charges in the trapping layer of an ONO (Oxide/Nitride/Oxide) film. U.S. Pat. No. 6,011,725 discloses a SONOS flash memory with virtual-ground memory cells having interchangeable source and drain, the source and drain operated in a symmetrical fashion.
FIG. 1A is a top view of a conventional flash memory (the ONO film is not shown). FIG. 1B is a cross-sectional view of the conventional flash memory, taken along the line D-D of FIG. 1A. FIG. 1A and FIG. 1B illustrate problems with the conventional flash memory structure. As shown in FIG. 1A and FIG. 1B, bit lines 12 formed with diffusion layers are provided in a semiconductor substrate 10. The bit lines 12 extend in the vertical direction of FIG. 1A. The bit lines 12 also serve as source and drain. An ONO film 20 formed with a tunnel oxide film 14, a trapping layer 16, and a top oxide film 18 is provided on the semiconductor substrate 10. Word lines 22 are provided on the ONO film 20, and extend in the width direction of the bit lines 12 (i.e., the horizontal direction of FIG. 1A). The word lines 22 also serve as gate electrodes.
A voltage is applied between the bit lines 12 (i.e., between the source and drain) when charges are written into the trapping layer 16 of the ONO film 20. The portion of the semiconductor substrate 10 located between each two bit lines 12 below the word lines 22 serves as a channel 44a through which current flows. In FIG. 1A, reference numeral 42 indicates the flow of electrons. The electrons with high energy at the end of the channel on the side of the bit line 12 (the drain) are captured by the trapping layer 16. As a result, a charge storing region C0 is formed. Here, fringing current flows through each region 44b in the semiconductor substrate 10 on either side of the corresponding word line 22. Accordingly, electrons are also captured by the trapping layer 16 on either side of the word line 22, and charge storing regions C1 are formed. The charges accumulated in the charge storing regions C1 cannot be erased. As a result, the charges accumulated in the charge storing regions C1 cause an error when the distance between each two word lines 22 is reduced when reducing the size of each memory cell.
Where portions of the top oxide film 18 located between the word lines 22 are removed during the middle of the manufacturing process, for example, the surface of the trapping layer 16 might be oxidized during a later procedure. As a result, a silicon oxynitride film 46 is formed on each portion of the trapping layer 16 located between the word lines 22, as shown in FIG. 1B. Since the silicon oxynitride film 46 has higher conductivity than the trapping layer 16, which is a silicon nitride film, the electrons captured in the trapping layer 16 move into the silicon oxynitride film 46, thereby reducing the charge writing time.